The present invention relates to a semiconductor device and a method of fabricating the same and, more particularly, to a semiconductor device having a multilevel interconnection formed on a semiconductor device and a method of fabricating the same.
In a multilevel interconnection technology performed on a semiconductor device in order to increase the packing density of a semiconductor integrated circuit, planarization of an interlevel film is a very important factor, and a number of dielectrics film formation methods have been developed. A representative method is a sol coating method (spin on glass) by which planarization can be easily obtained. Also, ozone TEOS (tetraethoxysilane) CVD making use of a chemical reaction using TEOS and ozone as materials has been put into practical use recently.
It is, however, known that in these methods, a large amount of water is contained as a reaction product in a film.
On the other hand, as a drain electric field is increased due to miniaturization of MOSFETs, a hot-carrier tolerance has become a major problem in device reliability; carriers acquiring a high-energy state (becoming hot) in a high electric field are injected into a gate oxide film and trapped inside the oxide film or generate an interfacial level between the gate oxide film and a substrate, thereby degrading the device characteristics. It is known that if a large amount of an OH group is present in the gate oxide film, the degradation in device characteristics caused by hot-carrier injection is increased.
A dielectrics film formed by the spin on glass or the ozone TEOS (tetraethoxysilane) CVD (chemical vapor deposition) contains a large amount of water. If this water diffuses to a gate oxide film, an OH group is formed in the gate oxide film, and this may accelerate device degradation by hot carriers. Therefore, the use of a dielectrics film formed by these methods as a monolayer film is unpreferable in device reliability. Conventionally, as a method of forming these dielectrics films not directly on an interconnection, a method of forming dielectrics films by using glow discharge plasma CVD has also been developed. However, such a film is formed not for the purpose of preventing device degradation but as a protective film for preventing an interconnection degradation caused by the film formation temperature or impurities in the film. Actually, a first interlevel film was formed in this manner, and a first metal interconnection was formed on a MOS transistor device. Subsequently, a dielectrics film according to the plasma CVD as a second interlevel film, a film according to the ozone TEOS-CVD, and a dielectrics film according to the spin on glass were formed in this order to constitute a multilevel dielectrics film. After annealing was performed, film formation was again performed by the plasma CVD. In addition, holes are formed in this second interlevel dielectrics as connection holes with respect to a second metal interconnection, and the second metal interconnection and an interconnection pattern were formed. A plasma CVD film for surface protection was also formed. Lastly, annealing was performed in a hydrogen atmosphere at 400.degree. C. FIG. 1 shows the degradation characteristics of a fine MOS transistor device formed through the above process.
FIG. 1 shows the substrate current (Isub) dependency per unit channel width of the reliability life time of the device. The substrate current (Isub) is directly proportional to the number of hot carriers generated; the larger the power supply applied to a device, the larger the substrate current. As shown in FIG. 1, there is a linear relationship, on a log-log plot, between the reliability life time and the substrate current (Isub) according to hot carriers. Hence, it is common practice to use the substrate current dependency of characteristics degradation in order to predict the reliability life time. It is predicted from FIG. 1 that the life time is about two months for a power supply of 3.3 V; in practice, the life time is required to be 10 years. This demonstrates that a device having such an interlevel film configuration cannot ensure a satisfactory reliability.